Method of efficiently handling multiple page sizes in an...

Details Method of efficiently handling multiple page sizes in an... Method of efficiently handling multiple page sizes in an...

2007-01-02

2007-01-02

Kim, Matthew (Department: 2186)

Electrical computers and digital processing systems: memory

Address formation

C711S206000, C711S208000

Reexamination Certificate

active

10730953

ABSTRACT:
A method and apparatus for efficiently storing an effective address (EA) in an effective to real address translation (ERAT) table supporting multiple page sizes by adding PSI fields, based on the number of unique page sizes supported, to each ERAT entry and using one ERAT entry to store an EA for a memory page, regardless of page size, by setting the PSI fields to indicate the page size.

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patent: 2005/0027961 (2005-02-01), Zhang

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