Sparse matrix paging system

Details Sparse matrix paging system Sparse matrix paging system

2007-03-27

2007-03-27

Bragdon, Reginald (Department: 2189)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S206000, C711S207000

Reexamination Certificate

active

10315557

ABSTRACT:
A sparse matrix paging system is provided that dynamically allocates memory resources on demand. In some cases, this is accomplished by dynamically allocating memory resources, preferably only after a page has been requested. Such a sparse matrix paging system may allow a platform with a large linear address space to more efficiently execute on a platform with a smaller linear address space. Preferably, the sparse matrix paging system only indexes those pages that are actually requested and used in the address space on main store pages or backing store pages. Further, the backing store is preferably not involved unless the total address space allocated by the operating system exceeds the available main store pages.

REFERENCES:
patent: 5420993 (1995-05-01), Smith et al.
patent: 5530823 (1996-06-01), Tsuchiya et al.
patent: 5724538 (1998-03-01), Morris et al.
patent: 5732404 (1998-03-01), Johnson et al.
patent: 5815686 (1998-09-01), Earl et al.
patent: 6327640 (2001-12-01), Gittinger et al.
patent: 6832295 (2004-12-01), Stonecypher
patent: 6868017 (2005-03-01), Ikeda
Andrew S. Tanenbaum, Structured Computer Organization, 1990, Prentice Hall, pp. 321-329.

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