Electrical computers and digital processing systems: support – Computer power control – By external command
Reexamination Certificate
2007-05-15
2007-05-15
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Computer power control
By external command
C713S320000
Reexamination Certificate
active
10307146
ABSTRACT:
A power management technique uses system management interrupt (SMI) to manage performance states of logical processors in a physical processor. Each logical processor is associated with a virtual performance state and an actual performance state. A request to retrieve or to change the virtual performance state causes the SMI to be generated. The virtual performance state is a state known to an operating system (OS). The actual performance state is a state that the logical processor is operating at.
REFERENCES:
patent: 5021679 (1991-06-01), Fairbanks et al.
patent: 5153535 (1992-10-01), Fairbanks et al.
patent: 5307003 (1994-04-01), Fairbanks et al.
patent: 5502838 (1996-03-01), Kikinis
patent: 5627412 (1997-05-01), Beard
patent: 5724565 (1998-03-01), Dubey et al.
patent: 5752011 (1998-05-01), Thomas et al.
patent: 5812860 (1998-09-01), Horden et al.
patent: 5974557 (1999-10-01), Thomas et al.
patent: 6038632 (2000-03-01), Yamazaki et al.
patent: 6105142 (2000-08-01), Goff et al.
patent: 6157989 (2000-12-01), Collins et al.
patent: 6216235 (2001-04-01), Thomas et al.
patent: 6314511 (2001-11-01), Levy et al.
patent: 6427211 (2002-07-01), Watts, Jr.
patent: 6487668 (2002-11-01), Thomas et al.
patent: 6564328 (2003-05-01), Grochowski et al.
patent: 6704876 (2004-03-01), Iacobovici et al.
patent: 6718474 (2004-04-01), Somers et al.
patent: 6829713 (2004-12-01), Cooper et al.
patent: 6834353 (2004-12-01), Smith et al.
patent: 6836849 (2004-12-01), Brock et al.
patent: 6895520 (2005-05-01), Altmejd et al.
patent: 2002/0083353 (2002-06-01), Orenstein et al.
patent: WO 99/61991 (1999-12-01), None
Gurindar S. Sohi et al., “Speculative Multithreaded Processors”, Apr. 2001, pp. 66-73.
Gregory T. Byrd et al., “Multithreaded Processor Architectures” IEEE Spectrum, Aug. 1995, pp. 38-46.
Anant Agarwal, “Performance Tradeoffs in Multithreaded Processors” IEEE Transactyions on Parallel and Distributed Systems, vol. 3n No. 5, Sep. 1992, pp. 525-539.
“Coordinating Multiple Server Partitions to Enter Power-Save State”, XP 00678586, pp. 235-239, vol. 39, No. 06, Jun. 1996, IBM Technical Disclosure Bulletin.
“Advanced Configuration and Power Interface Specification”, XP-002323945, pp. i-xviii and 1-232, Revision 2.0a, Mar. 31, 2002.
Cooper Barnes
Kobayashi Grant H.
Cao Chun
Intel Corporation
Wheeler Cyndi M.
LandOfFree
Method for managing virtual and actual performance states of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for managing virtual and actual performance states of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for managing virtual and actual performance states of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3733757