Floating point operation system which determines an exchange ins

Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing

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712221, 712226, 712228, 712235, G06F 9302

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active

060353910

ABSTRACT:
A system for processing a floating point instruction includes a stack, virtual registers, a stack pointer pointing to one of the virtual registers as top of stack, physical registers, and a reference table mapping the virtual registers to the physical registers, entries of the reference table pointing to physical register locations. An instruction unit generates a plurality of instructions, and a decode unit having a plurality of decoders receives the plurality of instructions from the instruction unit, respectively. The decode unit decodes the plurality of instructions and determines whether any one of the instructions contains a floating point instruction including a floating point exchange instruction. A logic unit is coupled to the reference table and includes a plurality of logic devices coupled to the plurality of decoders in the decode unit, respectively. The logic unit generates an updated table and maintains contents of the physical registers for each floating point exchange instruction received from the decode unit. A control unit receives the updated table from the logic unit and updates the reference table with the updated table.

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