MOS transistor with recessed gate and method of fabricating...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S510000

Reexamination Certificate

active

10884223

ABSTRACT:
A MOS transistor with a recessed gate and a method of fabricating the same: The MOS transistor comprises a semiconductor substrate, and a trench isolation layer located in a predetermined region of the semiconductor substrate for defining an active region. The trench isolation layer has a negative slope on at least a lower sidewall thereof. A recessed gate is located in a predetermined region of the active region, and a bottom surface of the recessed gate is placed adjacent the negatively slopped sidewall of the trench isolation layer.

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patent: 6313008 (2001-11-01), Leung et al.
patent: 6465842 (2002-10-01), Nishinohara
patent: 6548374 (2003-04-01), Chung
patent: 2002/0072197 (2002-06-01), Kang et al.
patent: 2004/0099906 (2004-05-01), Ji et al.

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