Methods of forming metal interconnection lines in...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S623000

Reexamination Certificate

active

11009470

ABSTRACT:
A method of forming metal interconnection line for a semiconductor device being capable of forming a plug without voids irrespective of aspect ratios is provided. In one example, the method includes forming a first metal layer on a semiconductor substrate; forming a second metal layer on the first metal layer; forming the plugs by patterning the second metal layer; forming the lower metal interconnection lines by patterning the first metal layer; and forming an interlayer insulating layer having a planarized surface on the substrate to fill gaps between the lower metal lines and between the plugs.

REFERENCES:
patent: 6444565 (2002-09-01), Feild et al.
patent: 1019990060819 (1999-07-01), None
patent: 1020010065145 (2001-11-01), None

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