Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-12-12
2006-12-12
Ho, Tu-Tu (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S431000, C257SE31032
Reexamination Certificate
active
07148528
ABSTRACT:
An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.
REFERENCES:
patent: 5006477 (1991-04-01), Farb
patent: 5430321 (1995-07-01), Effelsberg
patent: 5580663 (1996-12-01), Campisano et al.
patent: 5962882 (1999-10-01), Sin
patent: 6287886 (2001-09-01), Pan
patent: 6407417 (2002-06-01), Nagata et al.
patent: 6417023 (2002-07-01), Suzuki et al.
patent: 6521925 (2003-02-01), Mori et al.
patent: 2002/0047115 (2002-04-01), Kawakami et al.
patent: 2002/0048837 (2002-04-01), Burke et al.
patent: 2002/0185700 (2002-12-01), Coffa et al.
patent: 2004/0173799 (2004-09-01), Patrick
Dickstein & Shapiro LLP
Ho Tu-Tu
LandOfFree
Pinned photodiode structure and method of formation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Pinned photodiode structure and method of formation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pinned photodiode structure and method of formation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3718282