Power-up and power-down circuit for system-on-a-chip...

Details Power-up and power-down circuit for system-on-a-chip... Power-up and power-down circuit for system-on-a-chip...

2006-10-10

2006-10-10

Lee, Eddie (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C327S539000, C327S540000, C307S043000, C307S085000

Reexamination Certificate

active

07119398

ABSTRACT:
A power-up and power-down circuit for an integrated circuit includes a voltage regulator set for a first voltage. A first I/O pad is coupled internally to an input to the voltage regulator and to first internal circuits. The second voltage is externally coupled to the first I/O pad. A second I/O pad is coupled internally to an output of the voltage regulator configured to drive the base of an external transistor. A third I/O pad of the integrated circuit is coupled internally to a reference-voltage input of the voltage regulator. A fourth I/O pad is coupled to a feedback input of the voltage regulator. A fifth I/O pad of the integrated circuit is coupled internally to logic circuitry that controls power-up and power down of the integrated circuit from internal signals including internal signals from a real-time clock circuit disposed on the integrated circuit.

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