Methods for improved data caching

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S133000, C711S135000, C711S136000, C711S159000, C711S160000

Reexamination Certificate

active

07093072

ABSTRACT:
Write transactions with large amounts of data using a typical cache may consume over half of the available backing store bandwidth because of the way traditional caching algorithms fill lines during a write-invoked eviction. Relaxing the traditional constraint of cache coherency improves write performance by eliminating unneeded cache line fills. This technique conserves backing store bandwidth during many write operations while having negligible impact on the cache's read performance.

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