Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-06-27
2006-06-27
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07069529
ABSTRACT:
A Solid State Integrated Circuit Layout is generated by specifying an intended functionality assortment and translating the functionality assortment into various circuitry representations. The circuitry representations are converted into circuit items of an overall circuit, whilst configuring both first interfaces between interacting circuit items within the overall circuit and also second interfaces between further such circuit items and an external world in accordance with predetermined interface specifications. In particular, for a situation wherein various such circuit items represent respective analog and/or steppable values to be specified on the basis of a circuit item in question, the parameter is assigned exclusively to a single such circuit item as a building block. The building block in question gets assigned a sufficient amount of in-design resizability and/or on-chip movability in accordance with a prespecified redefinability value range for the parameter in question.
REFERENCES:
patent: 6249901 (2001-06-01), Yuan et al.
patent: WO 95/32478 (1995-11-01), None
Do Thuan
McDermott, Esq. Robert M.
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