Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-08-15
2006-08-15
Baderman, Scott (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S005110, C714S718000
Reexamination Certificate
active
07093166
ABSTRACT:
An information handling system includes at least one microprocessor, a physical memory coupled to the at least one microprocessor, and a physical memory testing subsystem. The physical memory is configured to store an operating system. The physical memory testing subsystem is configured for a) querying the operating system for the size of the physical memory and a number of microprocessors, b) in response to the number of microprocessors, creating memory tester threads equal in number to the number of microprocessors, c) in response to the size of the physical memory, allocating memory chunks of a virtual memory to be on the order of the size of the physical memory, d) dividing the allocated memory chunks equally among the memory tester threads, e) creating a scanner thread, and f) executing the memory tester threads and scanner thread, wherein the scanner thread is configured to increase the probability of maintaining the allocated memory in physical memory for a duration of physical memory testing by the memory tester threads.
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Baderman Scott
Contino Paul
Dell Products L.P.
Haynes and Boone LLP
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