Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-11-14
2006-11-14
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07137090
ABSTRACT:
Method and apparatus for phase-timing compensation is described. More particularly, a clock source and a clock sink of a path are identified for phase-timing compensation for a design. An absolute path slack is obtained, and phase offset of the clock source relative to the clock sink is determined. A normalizing factor responsive to the phase offset is generated. A normalized slack is computed using the absolute path slack and the normalizing factor.
REFERENCES:
patent: 5638016 (1997-06-01), Eitrheim
patent: 5771375 (1998-06-01), Mains
patent: 5845233 (1998-12-01), Fishburn
patent: 6014510 (2000-01-01), Burks et al.
patent: 6185723 (2001-02-01), Burks et al.
patent: 6209122 (2001-03-01), Jyu et al.
patent: 6401231 (2002-06-01), Belkhale et al.
patent: 6795954 (2004-09-01), Andreev et al.
patent: 2005/0065765 (2005-03-01), Visweswariah
patent: 2005/0066296 (2005-03-01), Visweswariah
Habib Youssef, Eugene Shragowitz; “Timing Constraints for Correct Performance”; 1990 IEEE; pp. 24-27.
H.C. Yen; S. Ghanta, H.C. Du; “A Path Selection Algorithm for Timing Analysis”; 1988 IEEE; 25th ACM/IEEE Design Automation Conference; Paper 43.5; pp. 720-722.
Robert B. Hitchcock, Sr.; “Timing Verification and the Timing Analysis Program”; Copyright IEEE; 19th Design Automation Conference; pp. 446-454.
Thomas G. Szymanski; “Computing Optimal Clock Schedules”; Proceedings 29th ACM/IEEE Design Automation Conference; 1992 IEEE; Paper 25.2; pp. 399-404.
Karem A. Sakallah et al., “checkT and minT: Timing Verification and Optimal Clocking of Synchronous Digital Circuits”; IEEE; 1990.
Abid Salim
Manaker, Jr. Walter A.
Chiang Jack
Dimyan Magid Y.
Webostad W. Eric
LandOfFree
Path slack phase adjustment does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Path slack phase adjustment, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Path slack phase adjustment will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3702125