Computer graphics processing and selective visual display system – Computer graphics display memory system – Register
Reexamination Certificate
2006-02-07
2006-02-07
Tung, Kee M. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Register
C345S501000, C345S543000
Reexamination Certificate
active
06995773
ABSTRACT:
The present invention optimizes graphics performance during zone rendering by providing an automatic management of bin memory between the binning and rendering phases. Embodiments of the present invention provide a mechanism by which the binner and renderer automatically share a pool of physical memory pages in order to build bin buffers and recycle them after they have been used in rendering. This is performed in such a fashion that multiple binned scenes can be queued up concurrently, with no requirement for software intervention except under exceptional conditions. The need for software management of zone rendering bin buffer memory is thus eliminated. Multiple scenes for binning and rendering can also be queued without software intervention.
REFERENCES:
patent: 6046752 (2000-04-01), Kirkland et al.
patent: 6344852 (2002-02-01), Zhu et al.
patent: 6380935 (2002-04-01), Heeschen et al.
patent: 6396473 (2002-05-01), Callahan et al.
patent: 2003/0122836 (2003-07-01), Doyle
patent: WO 01/37220 (2001-05-01), None
PCT International Search Report, dated Aug. 26, 2003 (International Application No. PCT/US02/39791—International Filing Date Nov. 12, 2002) (6 pgs).
Doyle Peter L.
Sreenivas Aditya
Intel Corporation
Tung Kee M.
Wong Sharon
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