Method of noise analysis and correction of noise violations...

Details Method of noise analysis and correction of noise violations... Method of noise analysis and correction of noise violations...

2006-06-13

2006-06-13

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07062731

ABSTRACT:
A method of noise analysis and correction of noise violations for an integrated circuit design includes steps of receiving as input a standard parasitic exchange file for an integrated circuit design and parsing the standard parasitic exchange file to generate a resistance graph. A representation of the resistance graph is generated to determine noise critical nets. A list is generated of only noise critical nets from the representation of the resistance graph. A net is selected from the list of only noise critical nets, and a value of total crosstalk noise in the selected net from all aggressor nets relative to the selected net is calculated. The value of total crosstalk noise in the selected net is generated as output for correcting a noise violation.

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