Bus interface controller for determining access counts

Details Bus interface controller for determining access counts Bus interface controller for determining access counts

2006-10-17

2006-10-17

McLean-Mayo, Kimberly (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S173000, C711S147000, C711S152000, C711S141000, C710S100000

Reexamination Certificate

active

07124257

ABSTRACT:
The present invention provides for an integrated circuit (IC) bus system. A local IC is coupled to a remote IC through a bus interface. A local memory is coupled to the local IC. A bus interface controller is employable to track data transfer requests from the remote IC for data address that are contained within at least one segment of the first partitioned memory range. The bus interface controller is further employable to stop the forwarding of a data transfer request generated within the local IC to the remote IC, if the memory segment count corresponding to the data address of the locally generated data transfer request equals zero.

REFERENCES:
patent: 6088769 (2000-07-01), Luick et al.
patent: 6349394 (2002-02-01), Brock et al.
patent: 2005/0120183 (2005-06-01), DeSota et al.

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