Nonvolatile memory device capable of simultaneous erase and...

Details Nonvolatile memory device capable of simultaneous erase and... Nonvolatile memory device capable of simultaneous erase and...

2006-06-06

2006-06-06

Nguyen, T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S103000

Reexamination Certificate

active

07058754

ABSTRACT:
An integrated circuit memory device has a memory array which is partitioned into a plurality of blocks. Each block has an associated row decoder. Each block has a plurality of local bit lines connecting memory cells arranged in the same column. The row decoder is connected to a plurality of row lines which are connected to memory cells arranged in the same row. A plurality of global column lines traverse across a plurality of blocks with each global column line associated with a local bit line from each of the blocks. A column decoder is connected to the plurality of the global column lines. A switch connects each global column line with its associated local bit line from each of the blocks. A control circuit determines when a particular block is to be programmed and a different block needs to be erased and activates the switches accordingly to cause the erase voltage to apply to one block and the programming voltage to apply to the second block.

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