Computer aided design system and computer-readable medium...

Details Computer aided design system and computer-readable medium... Computer aided design system and computer-readable medium...

2006-06-13

2006-06-13

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07062725

ABSTRACT:
A computer aided design system and a method for clock gated logic circuits, a computer-readable medium for storing the same and a gated clock circuit are provided in which the clock skew is suppressed within a tolerable level without increasing the electric power consumption.

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U.S. Appl. No. 09/052,363, filed Apr. 7, 1998, Kitahara.
Kitahara et al., “A Clock-Gating Method for Low-Power LSI Design,” Proceedings of ASP-DAC '98 (1998), pp. 307-312.
Schutz, “A 3.3 V 0.6 μm BiCMOS Superscalar Microprocessor,” 1994 IEEE International Solid-State Circuits Conference (1994), pp. 202-203.

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