Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-08-08
2006-08-08
Chace, Christian P. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C710S057000, C370S389000
Reexamination Certificate
active
07089380
ABSTRACT:
A method and system are described to compute a status for a circular queue within a memory device. A head pointer and a tail pointer are maintained to identify a head entry and a tail entry, respectively, within the queue. In response to an updating of at least one of the head pointer and the tail pointer, at least one of a near-full or a near-empty condition is detected. The detection is performed utilizing parallel operations. The detection of the near-empty and/or near-full conditions may be useful to avoid underflow and overflow errors.
REFERENCES:
patent: 5956340 (1999-09-01), Afek et al.
patent: 6745265 (2004-06-01), Sindalovsky
patent: 6851000 (2005-02-01), Lai
patent: 6865627 (2005-03-01), Wu
patent: 2002/0138692 (2002-09-01), Gerhart
Definitions, USPTO, Dec. 2002 edition.
Avago Technologies General IP ( Singapore) Pte. Ltd.
Chace Christian P.
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