Structures and methods of implementing a pass gate...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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C326S037000, C326S041000

Reexamination Certificate

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07046041

ABSTRACT:
Pseudo-differential multiplexer circuits and methods. The circuit input signals are provided to two similar multiplexers, one of which is driven by true signals and one by the complementary input signals. No matter what the values of the circuit input signals, at least one of the two multiplexers always selects a low value. Therefore, at least one of the two multiplexers has the capability of overcoming a value stored in an output circuit (e.g., a latch) coupled to the output terminals of the two multiplexers. Thus, even when neither multiplexer can provide a high signal at the full value of power high VDD, the output circuit provides the correct output value. The invention also encompasses methods of selecting between circuit input signals by utilizing a pseudo-differential multiplexing technique, e.g., utilizing multiplexer circuits similar to those described above.

REFERENCES:
patent: 6084437 (2000-07-01), Sako
patent: 6121797 (2000-09-01), Song et al.
patent: 6232799 (2001-05-01), Allen et al.
patent: 6621296 (2003-09-01), Carberry et al.
patent: 6768338 (2004-07-01), Young et al.

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