Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-08-22
2006-08-22
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S197000, C438S597000
Reexamination Certificate
active
07094693
ABSTRACT:
Disclosed is a semiconductor device of n-type MOSFET structure, which comprises a semiconductor substrate having a device isolation region, diffusion regions formed in the semiconductor substrate, gate electrodes formed above the semiconductor substrate, and a F-containing NiSi layer formed on the diffusion regions and containing F atoms at a concentration of 3.0×1013cm−2or more in areal density, wherein a depth from the junction position formed between the diffusion region and the semiconductor substrate to the bottom of the F-containing NiSi layer is confined within the range of 20 to 100 nm, and the concentration of F atoms at an interface between the F-containing NiSi layer and the semiconductor substrate is 8.0×1018cm−3or more.
REFERENCES:
patent: 5994210 (1999-11-01), Kerr
patent: 6713333 (2004-03-01), Mayuzumi
patent: 2002/0146904 (2002-10-01), Buynoski et al.
patent: 2004/0266194 (2004-12-01), Iinuma
patent: 2005/0250317 (2005-11-01), Koh et al.
patent: 11-111980 (1999-04-01), None
patent: 11-214328 (1999-08-01), None
LandOfFree
Method of manufacturing semiconductor device and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor device and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3634503