Multi-port memory device with global data bus connection...

Details Multi-port memory device with global data bus connection... Multi-port memory device with global data bus connection...

2006-05-09

2006-05-09

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Addressing

Multiple port access

C365S063000, C365S230030

Reexamination Certificate

active

07042791

ABSTRACT:
There is provided a multi-port memory device, which is capable of minimizing a layout area of a global data bus connection circuit while maintaining a line arrangement of global data buses. The multi-port memory device includes a plurality of unit global data bus connection circuits for selectively connecting first and second global data buses, each of which includes a plurality of lines. The plurality of unit global data bus connection circuits are arranged in M×N matrix (M and N are integers greater than or equal to two). The respective unit global data bus connection circuits are overlapped with line axis of the corresponding first and second global data buses and adjacent line axis. Loads to be driven by the control signal of the global data bus connection circuit can be reduced and skew of the pipe register control signal can be minimized.

REFERENCES:
patent: 5586299 (1996-12-01), Wakerly
patent: 6868030 (2005-03-01), Okuyama et al.

Affiliated with

Also associated with

Rating

Multi-port memory device with global data bus connection... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-port memory device with global data bus connection..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-port memory device with global data bus connection... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3632673