Incremental netlisting

Details Incremental netlisting Incremental netlisting

2006-08-01

2006-08-01

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07086030

ABSTRACT:
Method and apparatus for preparing a design in a high-level modeling system. Hardware description language (HDL) code is generated for one or more of a plurality of high-level subsystems in a high-level design tagged by the user for HDL code generation. Previously generated HDL code may be reused instead of generating new HDL code for each subsystem tagged by the user for HDL code reuse.

REFERENCES:
patent: 6425116 (2002-07-01), Duboc et al.
patent: 2001/0034876 (2001-10-01), Panchul et al.

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