Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-06-20
2006-06-20
Vinh, Lan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S710000, C438S715000, C134S001100
Reexamination Certificate
active
07064073
ABSTRACT:
According to one embodiment, a method for reducing contaminants in a reactor chamber is disclosed where the method comprises a step of etching the reactor chamber, which can comprise, for example, a dry etch process performed with hydrogen and HCL. Next, the reactor chamber is baked, which can comprise, for example, baking with hydrogen. Thereafter, an undoped semiconductor layer, such as an undoped silicon layer, is deposited in the reactor chamber to form a sacrificial semiconductor layer, for example, a sacrificial silicon layer. Then, the sacrificial semiconductor layer, for example, the sacrificial silicon layer, is removed from the reactor chamber. The removal step can comprise, for example, a dry etch process performed with HCL. In another embodiment, a wafer is fabricated in a reactor chamber that is substantially free of contaminants due to the implementation of the above method.
REFERENCES:
patent: 6277194 (2001-08-01), Thilderkvist et al.
patent: 6471771 (2002-10-01), Dietze
patent: 6596095 (2003-07-01), Ries et al.
patent: 2003/0073293 (2003-04-01), Ferro et al.
patent: 0945892 (1999-09-01), None
Farjami & Farjami LLP
Newport Fab LLC
Vinh Lan
LandOfFree
Technique for reducing contaminants in fabrication of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Technique for reducing contaminants in fabrication of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Technique for reducing contaminants in fabrication of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3622772