Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S201000, C365S189050

Reexamination Certificate

active

07031208

ABSTRACT:
A semiconductor memory device includes a redundant memory cell, an electrode and an output circuit. The redundant memory cell is used instead of a memory cell when the memory cell has a defect. The electrode applys with a test signal for setting a test condition from outside in testing the redundant memory cell. The output circuit outputs data read out of the memory cell and the redundant memory cell. When the test signal is applied to the electrode to set the test condition for the redundant memory cell, the output circuit is configured to output data read out of the redundant memory cell at a level different from a signal level of data readout of the memory cell for output.

REFERENCES:
patent: 5999450 (1999-12-01), Dallabora et al.
patent: 6079037 (2000-06-01), Beffa et al.
patent: 6094387 (2000-07-01), Mine et al.
patent: 6185709 (2001-02-01), Dreibelbis et al.
patent: 6297997 (2001-10-01), Ohtani et al.
patent: 6532182 (2003-03-01), Ogawa et al.
patent: 6829183 (2004-12-01), Braceras

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