Semiconductor integrated circuit having latching means...

Static information storage and retrieval – Read/write circuit – With shift register

Reexamination Certificate

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C365S078000, C365S230080, C365S230090, C365S239000, C365S240000, C714S727000

Reexamination Certificate

active

07057946

ABSTRACT:
Circuits have a certain function. A plurality of first registers are connected in series, and shift stored data to respective adjacent registers in sequence. A plurality of second registers are connected in series, and shift stored data to respective adjacent registers in sequence. The plurality of first and second registers are connected in one-to-one correspondence to a plurality of input terminals or to a plurality of output terminals. A first scan input terminal is formed at one end of the plurality of first series-connected registers, and a first scan output terminal is formed at the other end. A second scan input terminal is formed at one end of the plurality of second series-connected registers, and a second scan output terminal is formed at the other end. An operation control circuit controls operations of the circuits and the plurality of first and second registers.

REFERENCES:
patent: 6154396 (2000-11-01), Yabe et al.
patent: 6343365 (2002-01-01), Matsuzawa et al.
patent: 6408414 (2002-06-01), Hatada
patent: 6445627 (2002-09-01), Nakahara et al.
patent: 6639850 (2003-10-01), Fukuda
patent: 2001/0047499 (2001-11-01), Whetsel, Jr.
patent: 2002/0120895 (2002-08-01), Suzuki
patent: 6-66885 (1994-03-01), None
patent: 2000-0059512 (2000-10-01), None
Jun Ohtani, et al. “A Shared Built-In Self-Repair Analysis for Multiple Embedded Memories,” IEEE 2001 Custom Integrated Circuits Conference. 2001, pp. 187-190.

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