Selectable dynamic reconfiguration of programmable embedded IP

Details Selectable dynamic reconfiguration of programmable embedded IP Selectable dynamic reconfiguration of programmable embedded IP

2006-07-04

2006-07-04

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Security

C326S037000, C326S039000

Reexamination Certificate

active

07071726

ABSTRACT:
Improved communication, and an improved communication interface, between the core PLD fabric of a PLD and embedded IP building blocks resident therein is provided. A circuit according to the invention may include at least two different signal paths between the PLD core fabric and embedded IP building blocks. Either one, or both, of these two paths may be used for configuration and/or implementation of the embedded IP building blocks.

REFERENCES:
patent: 6260087 (2001-07-01), Chang
patent: 6326806 (2001-12-01), Fallside et al.
patent: 6605962 (2003-08-01), Lee et al.
patent: 6650140 (2003-11-01), Lee et al.
patent: 6744274 (2004-06-01), Arnold et al.
patent: 6750675 (2004-06-01), Venkata et al.
patent: 6779168 (2004-08-01), Hamlin
patent: 6907595 (2005-06-01), Curd et al.
patent: 6934922 (2005-08-01), Burnley
patent: 2001/0033188 (2001-10-01), Aung et al.
“45. Management Data Input/Output (MDIO) Interface”,IEEE Draft P802.3ae/D5.0, May 1, 2002, pp. 179-266.

Affiliated with

Also associated with

Rating

Selectable dynamic reconfiguration of programmable embedded IP does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Selectable dynamic reconfiguration of programmable embedded IP, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Selectable dynamic reconfiguration of programmable embedded IP will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3613852