Non-volatile memory cell and manufacturing method thereof

Details Non-volatile memory cell and manufacturing method thereof Non-volatile memory cell and manufacturing method thereof

2006-05-02

2006-05-02

Tran, Mai-Huong (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S330000, C257S390000, C257S302000, C257S316000, C365S185030, C438S259000, C438S589000

Reexamination Certificate

active

07038267

ABSTRACT:
A non-volatile memory cell is provided. The non-volatile memory at least includes a substrate, a gate, a first source/drain region, a composite dielectric layer and a second source/drain region. A trench is formed in a substrate and a gate is formed inside the trench. The first source/drain region is formed at the bottom of the trench. The composite dielectric layer is formed between the gate and the surface of the trench. The composite dielectric layer includes at least a charge-trapping layer. The second source/drain region is formed in the substrate next to the sides of the gate.

REFERENCES:
patent: 6486028 (2002-11-01), Chang et al.
patent: 6583479 (2003-06-01), Fastow et al.
patent: 6803284 (2004-10-01), Hwang
patent: 2004/0130934 (2004-07-01), Prall et al.

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