Testing processors

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C714S031000

Reexamination Certificate

active

06983398

ABSTRACT:
The present invention, in various embodiments, provides techniques for testing devices. In one embodiment, the device under test is a chip including a plurality of processors and a memory structure that stores test programs. One or more processors executes the test programs and generates test results based on which the chip may be determined good or bad. In one embodiment, the processors execute the test programs independent of each other, and no external hardware and/or test controller is required during the test phase. Various embodiments include a first processor that controls the scan chain of a second processor; the test results of the first processor are used as inputs for testing the second processor, etc.

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