Semiconductor device including impurity layer having a...

Details Semiconductor device including impurity layer having a... Semiconductor device including impurity layer having a...

2006-05-09

2006-05-09

Weiss, Howard (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S344000, C257S402000

Reexamination Certificate

active

07042051

ABSTRACT:
Provided is a manufacturing method of a semiconductor device which comprises forming, all over the surface of a substrate below the channel region of a MISFET, a p type impurity layer having a first peak in impurity concentration distribution and another p type impurity layer having a second peak in impurity concentration distribution, each layer having a function of preventing punch-through. Compared with a device having a punch through stopper layer of a pocket structure, the device of the present invention is suppressed in fluctuations in the threshold voltage. Moreover, with a relative increase in the controllable width of a depletion layer, a sub-threshold swing becomes small, thereby making it possible to prevent lowering of the threshold voltage and to improve a switching rate of the MISFET.

REFERENCES:
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patent: 5719081 (1998-02-01), Racanelli et al.
patent: 5827763 (1998-10-01), Gardner et al.
patent: 6143635 (2000-11-01), Boyd et al.
patent: 6153454 (2000-11-01), Krivokapic
patent: 6342429 (2002-01-01), Puchner et al.
patent: 6365473 (2002-04-01), Lee
patent: 04058562 (1992-02-01), None

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