Vertical MOS transistor

Details Vertical MOS transistor Vertical MOS transistor

2006-04-25

2006-04-25

Nguyen, Cuong (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S331000

Reexamination Certificate

active

07034359

ABSTRACT:
A vertical MOS transistor has a high concentration drain region, a low concentration drain region disposed on the high concentration drain region, a body region disposed on the low concentration drain region, a high concentration body contact region disposed on the body region, and a high concentration source region formed on a portion of the body region outside of the high concentration body contact region. A first silicon trench passes through the body region and the high concentration source region and extends into the low concentration drain region. A second silicon trench is disposed in contact with the high concentration body contact region but not in contact with the high concentration source region. A gate insulator film is formed in each of the first and second silicon trenches. High concentration polycrystalline silicon gates are embedded within the respective first and second trenches and are surrounded by the gate insulator film.

REFERENCES:
patent: 6828626 (2004-12-01), Oikawa et al.

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