Input circuit for receiving a signal at an input on an...

Details Input circuit for receiving a signal at an input on an... Input circuit for receiving a signal at an input on an...

2006-03-07

2006-03-07

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S021000, C327S108000

Reexamination Certificate

active

07009420

ABSTRACT:
An input circuit for receiving a signal at an input on an integrated circuit, particularly a DRAM circuit, and for assessing the signal with respect to a reference voltage is provided. One embodiment provides a termination circuit for setting a termination voltage, wherein the termination circuit includes a first resistor and a second resistor connected in series between a high voltage potential and a low voltage potential, the termination voltage being tapped between the first and second resistors, a first voltage-dependent resistor element having a first resistance gradient connected in parallel with the first resistor and a second voltage-dependent resistor element having a second resistance gradient connected in parallel with the second resistor, wherein the resistance values of the first and second resistor elements are controlled by a control voltage to set the termination voltage.

REFERENCES:
patent: 5602494 (1997-02-01), Sundstrom
patent: 5729152 (1998-03-01), Leung et al.
patent: 5982218 (1999-11-01), Sugawara
patent: 6218854 (2001-04-01), Ko
patent: 6281702 (2001-08-01), Hui
patent: 6362644 (2002-03-01), Jeffery et al.
patent: 2004/0189342 (2004-09-01), Song
patent: 101 46 509 (2003-04-01), None
German Examination Report Dated Jan. 13, 2004.

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