Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2006-09-19
2006-09-19
Bragdon, Reginald G. (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S006000, C711S144000
Reexamination Certificate
active
07111146
ABSTRACT:
A method for providing hardware support for memory protection and virtual memory address translation for a virtual machine. The method includes executing a host machine application within a host machine context and executing a virtual machine application within a virtual machine context. A plurality of TLB (translation look aside buffer) entries for the virtual machine context and the host machine context are stored within a TLB. Memory protection bits for the plurality of TLB entries are logically combined to enforce memory protection on the virtual machine application.
REFERENCES:
patent: 6907600 (2005-06-01), Neiger et al.
patent: 2004/0117593 (2004-06-01), Uhlig et al.
Bragdon Reginald G.
Kravets Leonid
Transmeta Corporation
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