Impedance-matched output driver circuits having enhanced...

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S083000, C327S108000

Reexamination Certificate

active

07053661

ABSTRACT:
Impedance-matched output driver circuits utilize predriver circuits with analog control to provide enhanced operating characteristics. This analog control may be provided by an analog loop containing differential amplifiers that set the resolution limit of the output driver circuit. These output driver circuits include a first PMOS pull-up transistor having source and drain terminals electrically connected in series in a pull-up path of the output driver circuit. An NMOS pass transistor has a first current carrying terminal electrically connected to a gate terminal of the first PMOS pull-up transistor and a second current carrying terminal configured to receive a P-type analog reference voltage (VP). This P-type reference voltage controls the conductivity of the first PMOS pull-up transistor in the pull-up path. A gate terminal of the NMOS pass transistor is responsive to a pull-up data input signal (DINP). A first NMOS pull-down transistor has source and drain terminals that are electrically connected in series in a pull-down path of the output driver circuit. A PMOS pass transistor is provided having a first current carrying terminal electrically connected to a gate terminal of the first NMOS pull-down transistor and a second current carrying terminal configured to receive an N-type analog reference voltage (VN). This N-type reference voltage controls the conductivity of the first NMOS pull-down transistor in the pull-down path. A gate terminal of the PMOS pass transistor is responsive to a pull-down data input signal (DINN).

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Fan et al., “On-Die Termination Resistors with Analog Impedance Control for Standard CMOS Technology,” IEEE Journal of Solid-State Circuits, vol. 38, No. 2, Feb. 2003, pp. 361-364.
U.S. Appl. No. 10/616,272, filed Jul. 9, 2003.

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