Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-03-14
2006-03-14
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07013451
ABSTRACT:
Some embodiments of the invention provide a method of determining whether a set of routes can be geometrically embedded in a region according to a particular wiring model. The method identifies a congestion graph that has a set of edges, where at least two edges are neither orthogonal nor parallel. For each edge, the method identifies the set of routes that intersect the edge. It then determines whether any edge is overcongested.
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Jacques Etienne
Teig Steven
Cadence Design Systems Inc.
Kik Phallaka
Smith Matthew
Stattler Johansen & Adeli LLP
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