Method and system for reducing power consumption in a...

Details Method and system for reducing power consumption in a... Method and system for reducing power consumption in a...

2006-01-31

2006-01-31

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S323000, C713S324000

Reexamination Certificate

active

06993668

ABSTRACT:
A system and methods for reducing power consumption in a computing device during the execution of a tight loop. When a tight loop is detected, the data cache and the translation look-aside buffer are powered off until the end of the loop. The instruction cache and the branching unit are also powered off, except for monitoring the end of the loop condition.

REFERENCES:
patent: 5617348 (1997-04-01), Maguire
patent: 5991848 (1999-11-01), Koh
patent: 6026476 (2000-02-01), Rosen
patent: 6279083 (2001-08-01), MacDonald
patent: 6678815 (2004-01-01), Mathews et al.
patent: 6772355 (2004-08-01), Homewood et al.
Lee et al, Instruction Fetch Energy Reduction Using Loop Caches For Embedded Applications with Small Tight Loops, Aug. 1999, IEEE, pp. 267-269.

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