Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-01-03
2006-01-03
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S142000, C711S143000, C711S145000
Reexamination Certificate
active
06983348
ABSTRACT:
Methods and Apparatus for cache-to-cache transfers upon snooping a cache interconnect to detect a memory read request associated with a cache memory block cached in a first cache and a second cache. Upon a cache hit to a first and a second cache, supplying the cached memory block from the first cache or the second cache to a third cache based on a predetermined arbitration hierarchy.
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Edirisooriya Samantha J.
Jamil Sujat
Miner David E.
Nguyen Hang
O'Bleness R. Frank
Hanley Flight & Zimmerman LLC
Intel Corporation
Peugh Brian R.
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