Method and apparatus for asynchronous read control

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Reexamination Certificate

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07082504

ABSTRACT:
A method and apparatus for operating a memory is presented. Information is stored in the memory based on a first time domain and information is read from the memory based on a second time domain. A cooperative relationship is maintained between a write pointer which points to memory locations, where data will be stored and a read pointer which points to memory locations, from which data will be read. A FIFO memory is presented which has memory locations and a register array is presented which stores a bit array that has bit locations. Each bit location in the bit array corresponds to a memory location in the memory. As the write pointer points to a memory location and data is stored in the memory location, a bit (e.g. flag) is set in the bit array. The Flag designates whether the data stored in the memory location is available for reading. Prior to reading information from the memory location, a test is made of the bit location that corresponds to the memory location. The bit value denotes whether the data stored in the memory location is valid data and available for reading.

REFERENCES:
patent: 6584584 (2003-06-01), Smith
patent: 6792484 (2004-09-01), Hook
patent: 2002/0138674 (2002-09-01), Mann
patent: 2003/0112798 (2003-06-01), Ziegler et al.
patent: 2003/0217215 (2003-11-01), Taborek et al.
patent: 2004/0004975 (2004-01-01), Shin et al.

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