Register window flattening logic for dependency checking...

Electrical computers and digital processing systems: processing – Processing control

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C712S216000

Reexamination Certificate

active

07080237

ABSTRACT:
A technique for flattening architectural register windows into flattened space depending on a current window pointer to a register window is provided. The technique involves converting an n-bit value of a particular register in a register window to an x-bit value dependent on the current window pointer, where x is greater than n, and where the x-bit value is used for register dependency checking among a plurality of instructions.

REFERENCES:
patent: 5799166 (1998-08-01), Leung
patent: 5870597 (1999-02-01), Panwar et al.
patent: 6230317 (2001-05-01), Wu

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Register window flattening logic for dependency checking... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Register window flattening logic for dependency checking..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Register window flattening logic for dependency checking... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3585002

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.