Dual purpose interface using refresh cycle

Details Dual purpose interface using refresh cycle Dual purpose interface using refresh cycle

2006-07-11

2006-07-11

Peikari, B. James (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S100000, C711S104000, C711S106000, C711S167000, C711S168000, C365S222000, C365S223000, C365S230040, C365S230050, C365S230060, C365S240000, C365S236000, C710S020000, C710S021000, C710S036000, C710S038000, C710S001000, C710S007000

Reexamination Certificate

active

07076600

ABSTRACT:
A method and system for optimizing use of signal paths on a DRAM interface. Signal paths that have a ‘don't care’ status during DRAM refresh are assigned to communication with another device. Onset of the refresh procedure triggers diversion of shared signal paths away from the DRAM to the other device for the duration of the refresh the shared signal paths include at least some of the address and data signal paths.

REFERENCES:
patent: 4991112 (1991-02-01), Callemyn
patent: 5487157 (1996-01-01), Mizugaki
patent: 6188627 (2001-02-01), Blackmon et al.
patent: 6222564 (2001-04-01), Sturges
patent: 6222785 (2001-04-01), Leung
patent: 6563754 (2003-05-01), Lien et al.
patent: 6741515 (2004-05-01), Lazar et al.

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