Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-09-12
2006-09-12
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S703000, C438S706000
Reexamination Certificate
active
07105453
ABSTRACT:
A method of forming contact holes. A substrate on which a plurality of gate structures is formed is provided, wherein the gate structure comprises a gate, a gate capping layer, and a gate spacer. An insulating layer is formed on the gate structures and fills between the gate structures. The insulating layer is etched using the gate capping layers, the gate spacers, and the substrate as stop layers to form first contact holes between the gate structures to expose the substrate and the gate spacers and form second contact holes overlying each gate structure to expose the gate capping layers. A protective spacer is formed over each sidewall of the first contact holes and the second contact holes. The gate capping layer under each gate contact hole is etched using the protective spacer as a stop layer to expose the gate. The protective spacers are removed.
REFERENCES:
patent: 6281059 (2001-08-01), Cheng et al.
patent: 6426256 (2002-07-01), Chen
patent: 6451708 (2002-09-01), Ha
patent: 6534361 (2003-03-01), Lee
Chen Yi-Nan
Huang Tse-Yao
Mao Hui-Min
Nanya Technology Corporation
Norton Nadine G.
Quintero Law Office
Umez-Eronini Lynette T.
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