Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-05-09
2006-05-09
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S145000, C711S156000, C714S006130
Reexamination Certificate
active
07043609
ABSTRACT:
A method for protecting reliability of data associated with a data array is provided. The method initiates with defining state information associated with the data array. Then, crucial state information is identified from the state information. Next, a copy of the crucial state information is generated. Then, the state information and the copy of the crucial state information are protected. Next, a worst case state associated with non-crucial information is defined. In response to detecting an error associated with the non-crucial information, the method includes defaulting to the worst case state. A computer readable media and a shared memory multiprocessor chip are also provided.
REFERENCES:
patent: 6704838 (2004-03-01), Anderson
patent: 6816917 (2004-11-01), Dicorpo et al.
patent: 2004/0117571 (2004-06-01), Chang et al.
patent: 2004/0130837 (2004-07-01), Papallo et al.
Iacobovici Sorin
Melamed Victor
Bataille Pierre-Michel
Martine & Penilla & Gencarella LLP
Sun Microsystems Inc.
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