Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-07-18
2006-07-18
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C703S019000
Reexamination Certificate
active
07080345
ABSTRACT:
Methods and apparatus are provided for design entry and synthesis of components, such as components implemented on a programmable chip. In one example, a design tool receives natural or intuitive parameters describing characteristics of a component in a design. Natural or intuitive parameters include input data rate, output latency, footprint, etc. Non-natural or non-intuitive parameters such as clock rate and pipeline stages need not be provided. The design tool automatically selects optimal components using natural parameters. Multiple instantiations of an optimal component, or multiplexing through an optimal component can be used to further improve the design.
REFERENCES:
patent: 6120549 (2000-09-01), Goslin et al.
patent: 6385757 (2002-05-01), Gupta et al.
patent: 6401230 (2002-06-01), Ahanessians et al.
patent: 2004/0107078 (2004-06-01), Chiu et al.
U.S. Appl. No. of Mihail Iotov and Gregory Starr, 10/353,816, filed Jan. 28, 2003 for “System And Method For Design Entry And Synthesis In Programmable Logic Devices”.
Beyer Weaver & Thomas LLP
Garbowski Leigh M.
LandOfFree
Methods and apparatus for design entry and synthesis of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and apparatus for design entry and synthesis of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus for design entry and synthesis of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3567008