Method of forming 2/3F pitch high density line array

Details Method of forming 2/3F pitch high density line array Method of forming 2/3F pitch high density line array

2006-01-03

2006-01-03

Smith, Matthew (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S584000, C438S587000, C438S666000, C438S668000

Reexamination Certificate

active

06982221

ABSTRACT:
A method of forming a ⅔F pitch high density line array, where F is the minimum line width of a photolithographic process used to accomplish the method of the invention; includes depositing a conductive material on a wafer; depositing a layer of sacrificial material; etching the sacrificial material to form a placeholder having width and space of F; depositing sidewall spacer material hard mask to a thickness of about ⅓F on the sacrificial material; anisotropically etching the hard mask material; depositing a layer of silicon oxide and smoothing the silicon oxide; selectively removing the placeholder; depositing a second sidewall spacer layer to a thickness of about ⅓F; depositing and smoothing another hard mask layer; etching the silicon oxide and conductive material using the other hard mask lines as a pattern; etching to form interconnect lines; and selectively etching any remaining hard mask material to expose lines and contact pads.

REFERENCES:
patent: 6110837 (2000-08-01), Linliu et al.
patent: 6156485 (2000-12-01), Tang et al.
patent: 6399286 (2002-06-01), Liu et al.

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