Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-04-25
2006-04-25
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S639000, C438S672000, C438S386000
Reexamination Certificate
active
07033934
ABSTRACT:
A semiconductor package of superior high frequency characteristics enabling easy mounting of a large-sized capacitor and thereby enabling fluctuation of the power supply voltage to be suppressed and enabling a reduction of the inductance of the wiring portion connecting the capacitor and a connection terminal, that is, a semiconductor package mounting a capacitor for suppressing fluctuation of a power supply voltage, wherein the capacitor is comprised of, in an attachment hole passing through the board in the thickness direction, a conductor wire to be connected to a connection terminal of a semiconductor chip at one end, a high dielectric constant material covering the conductor wire at a predetermined thickness, and a conductor layer arranged between the outer circumference of the high dielectric constant material and the inner wall of the attachment hole, provided as a coaxial structure having the conductor wire at its center, and a method of production of the same.
REFERENCES:
patent: 6072690 (2000-06-01), Farooq et al.
patent: 6314013 (2001-11-01), Ahn et al.
patent: 6605551 (2003-08-01), Wermer et al.
patent: 6717071 (2004-04-01), Chang et al.
patent: 2002/0017399 (2002-02-01), Chang et al.
patent: 2004/0149490 (2004-08-01), Chang et al.
patent: A-5-167258 (1993-07-01), None
patent: A-10-163-632 (1998-06-01), None
patent: A-2001-352166 (2001-12-01), None
English Translation Of JP 05-167258.
Iijima Takahiro
Rokugawa Akio
Fourson George
Paul and Paul
Pham Thanh V.
Shinko Electric Industries Co. Ltd.
LandOfFree
Method of production of semiconductor package does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of production of semiconductor package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of production of semiconductor package will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3561959