Methods of programming non-volatile semiconductor memory...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185180, C365S185230, C365S185280

Reexamination Certificate

active

06987694

ABSTRACT:
A non-volatile memory device may include a string of serially connected memory cell transistors with each memory cell transistor of the string being connected to a different word line. The non-volatile memory device may be programmed by applying a pass voltage to a first word line connected to a first memory cell transistor of the string, by applying a coupling voltage to a second word line connected to a second memory cell transistor of the string, and by applying a program voltage to a third word line connected to a third memory cell transistor of the string. More particularly, the coupling voltage can be greater than a ground voltage of the memory device, and the pass voltage and the coupling voltage can be different. In addition, the program voltage can be applied to the third word line while applying the pass voltage to the first word line and while applying the coupling voltage to the second word line, and the third memory cell transistor can be programmed responsive to applying the program voltage to the third word line wherein the second memory cell transistor is between the first and third memory cell transistors of the serially connected string. Related devices are also discussed.

REFERENCES:
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patent: 6061270 (2000-05-01), Choi
Jea-Duk Lee; “Effects of Floating-Gate Interference on NAND Flash Memory Cell Operation”, IEEE Electron Device Letters, vol. 23, No. 5 (May 2002).

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