Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2006-09-12
2006-09-12
Tran, M. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S201000
Reexamination Certificate
active
07106640
ABSTRACT:
There is provided a semiconductor memory device capable of detecting a repaired address in a test mode. The semiconductor memory device includes: a plurality of unit address detectors for comparing 1-bit address signal with a stored 1-bit repair address signal to output a repair signal, and for buffering the stored repair address signal and outputting the buffered repair address signal as the repair signal in a test mode; a redundancy address detector for combining the plurality of repair signals from the unit address detectors and outputting a detection signal for detecting whether a current input address is a redundancy address; and a redundancy flag signal generator for generating a redundancy flag signal in response to the detection signal and transferring the redundancy flag signal to a data output path.
REFERENCES:
patent: 6285620 (2001-09-01), Ho et al.
patent: 6404683 (2002-06-01), Yumoto
patent: 1020020030183 (2002-04-01), None
Lee Jae-Jin
Yoon Seok-Cheol
Hynix / Semiconductor Inc.
Mayer, Brown, Rowe and Maw LLP
Tran M.
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