Bit line sense amplifier for inhibiting increase of offset...

Details Bit line sense amplifier for inhibiting increase of offset... Bit line sense amplifier for inhibiting increase of offset...

2006-05-09

2006-05-09

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S063000

Reexamination Certificate

active

07042782

ABSTRACT:
A bit line sense amplifier for inhibiting increase of an offset voltage, and a method for fabricating the same are provided. The bit line sense amplifier comprises a plurality of CMOS inverters, which are cross-coupled corresponding to the paired bit lines. Each of the CMOS inverters senses and amplifies a voltage of the paired bit lines. Here, transistors comprised in each inverter are positioned at the same location in a well region where the transistors are formed. As a result, increase of the offset voltage due to inconsistency of electrical characteristics which results from difference in location of devices is inhibited, thereby improving sensitivity of the sense amplifier and characteristics of the DRAM.

REFERENCES:
patent: 6133597 (2000-10-01), Li et al.
patent: 6812540 (2004-11-01), Takaura et al.

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