Electrically programmable non-volatie semiconductor memory devic

Details Electrically programmable non-volatie semiconductor memory devic Electrically programmable non-volatie semiconductor memory devic

1991-02-21

1993-03-16

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

365185, 257365, 257528, H01L 2968

Patent

active

051949253

ABSTRACT:
A one transistor memory cell for a flash EEPROM includes: a first control gate which is disposed on a first channel region between a source region and a drain region and separated therefrom by a first insulating film; a floating gate disposed on a second channel region and is separated therefrom by a second insulating film, the floating gate disposed on the first control gate and separated therefrom by a first interlayer insulating film; and a second control gate disposed on a surface of said floating gate and separated therefrom by a second interlayer insulating film; and wherein one end of the second control gate and one end of the first control gate are electrically connected to each other through a third control gate, thereby enhancing capacity between the control gates and the floating gate.

REFERENCES:
patent: 4618876 (1986-10-01), Stewart et al.
patent: 4989054 (1991-01-01), Arima et al.
patent: 5014097 (1991-05-01), Kazerounian et al.
Extended Abstract of the 21st Conference on Solid State Devices and Materials, entitled "A New Stacked Capacitor Cell with Thin Box Structured Storage Node", by Inoue et al., 1989, pp. 141-144.

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