Micro structure with interlock configuration

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive

Reexamination Certificate

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C438S053000, C438S739000

Reexamination Certificate

active

07071017

ABSTRACT:
A micro structure has: a semiconductor substrate; an insulating film having a via hole and formed on the semiconductor substrate; an interlock structure formed on a side wall of the via hole and having a retracted portion and a protruded portion above the retracted portion; a conductive member having at one end a connection portion formed burying the via hole and an extension portion continuous with the connection portion and extending along a direction parallel to a surface of the semiconductor substrate.

REFERENCES:
patent: 6900071 (2005-05-01), Okumura et al.
patent: 6905905 (2005-06-01), Okumura et al.
patent: 2003/0036215 (2003-02-01), Reid
patent: 2003/0045019 (2003-03-01), Kubena
patent: 2004/0023429 (2004-02-01), Foerstner et al.
patent: 2001-121499 (2001-05-01), None
Biebl, M., et al.; “In Situ Phosphorus-Doped Polysilicon for Integrated MEMS”; The 8th International Conference on Solid-State Sensors and Actuators, and Eurosensors IX; Stockholm, Sweden; Jun. 25-29, 1995; pp. 196-201.
Esasi, Masayosi,; “Micro Machine”; Industrial Technology Information Service Center Ltd.; pp. 55-56.

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