Method and system with multiple exception handlers in a...

Details Method and system with multiple exception handlers in a... Method and system with multiple exception handlers in a...

2005-08-02

2005-08-02

Chan, Eddie (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

Reexamination Certificate

active

06925552

ABSTRACT:
An exception handler for a processor is split into two functional units to permit exceptions to be classified into two categories. The first category of exceptions includes performance critical excepted instructions, while the second category includes non-performance critical excepted instructions. The performance critical exceptions are routed to a speculative exception handler, which resolves the exceptions speculatively, even though the excepted instruction may lie in a speculative path of the program flow. The non-performance critical exceptions are routed to a non-speculative exception handler that only resolves exceptions when the excepted instruction is certain to execute in an actual path of the program flow.

REFERENCES:
patent: 5634023 (1997-05-01), Adler et al.
patent: 5765007 (1998-06-01), Rahman et al.
patent: 6681322 (2004-01-01), Safford et al.
patent: 6721874 (2004-04-01), Le et al.
Dehnert, James C. et al., “The Transmeta Code Morphing Software: using speculation, recovery, and Adaptive retranslation to address real-life challenges”, Mar. 2003, Proceedings of the international symposium on Code generation and optimization, pp. 15-24.
Ando, Hideki, “Unconstrained Speculative Execution with Predicated State Buffering”, May 1995, ACM SIGARCH Computer News, Proceedings of the 22ndannual international symposium on Computer Architecture, vol. 23 Issue 2, pp. 126-137.

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